List of Messages
Parent topic: List of Messages

ID:12386 Your design uses true differential and single ended I/O standards which requires additional I/O placement guidance. (1) No action is required if I/O bank containing differential I/O pins has no single ended LVTTL or LVCMOS pins. (2) No action is required if I/O bank containing differential I/O pins has terminated SSTL or HSTL I/O pins, termination can be on or off chip. (3) If I/O bank containing differential I/O pins uses LVTTL, LVCMOS, or non-terminated SSTL or HSTL pins, refer to the Cyclone V Device Family Pin Connection Guidelines for rules on drive strength limitations for single ended output pins, and contact Altera for additional information for pin location requirements.

CAUSE: Your design uses a true differential I/O standard which requires additional I/O placement guidance.

ACTION: Contact Altera for additional information.

Parent topic: List of Messages

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