ID:307078 ALTMEMPHY PLL, <name>, when fed by another PLL, must have the bandwidth mode set to <name> instead of <name>

CAUSE: The jitter or uncertainty values used in the ALTMEMPHY timing analysis for the memory interface depend on a specific circuit topology.

ACTION: To obtain accurate jitter or uncertainty values, you must change the design so that the ALTMEMPHY PLL, when fed by another PLL, has the bandwidth mode set to the specified setting.