List of Messages
Parent topic: List of Messages

ID:307015 Memory clock pins <name> and <name> must be placed on <name> p- and n-pins.

CAUSE: The jitter or uncertainty values used in the ALTMEMPHY timing analysis for the memory interface depend on a specific circuit topology.

ACTION: To obtain accurate jitter or uncertainty values, you must change the design so that the memory clock pins are placed on the correct p- and n-pins.

Parent topic: List of Messages

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