List of Messages
Parent topic: List of Messages

ID:307071 Input clock to the ALTMEMPHY PLL, <name>, when fed by another PLL, must come from the dedicated PLL to the PLL cascade path

CAUSE: The requirement on the memory interface needed for using macro timing parameters in the ALTMEMPHY timing analysis has been violated.

ACTION: Change the design so that the input clock to the ALTMEMPHY PLL, when fed by another PLL, must come from the dedicated PLL to the PLL cascade path.

Parent topic: List of Messages

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