List of Messages |
CAUSE: You restricted the specified PLL to use specific counters for each output clock with the Force PLL Output Counter logic option (that is, the PLL_FORCE_OUTPUT_COUNTER option is used to specify the counter used in the Quartus Prime Settings File (.qsf)). Additionally, some of the PLL_FORCE_OUTPUT_COUNTER assignments were ignored, as indicated in the sub-messages of this message.
ACTION: No action is necessary. Refer to the sub-messages to learn which assignments were ignored and to learn which action can be taken to avoid receiving this message in the future.
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