List of Messages |
CAUSE: The specified PLL in the specified mode does not have the specified output clock feeding a dedicated PLL output pin. As a result, the output will not be fully compensated.
ACTION: Connect the output clock to an I/O output pin, or assign the output pin only to a dedicated PLL clock output location. Alternatively, set the PLL to No Compensation mode instead if you do not want compensation.
Copyright© 2015 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS, STRATIX, and all other brands, unless noted otherwise, and/or trademarks of Altera Corporation in the U.S. and other countries.