List of Messages |
CAUSE: The specified clock port of the specified PLL feeds an output pin via non-dedicated routing. This may cause jitter performance to degrade due to noise from multiple switching design elements. Use PLL dedicated clock outputs to ensure jitter performance.
ACTION: To avoid receiving this message, modify the design so that the specified clock ports of the specified PLL do not feed an output pin or use the PLL dedicated clock outputs to feed an output pin for better jitter performance.
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