List of Messages |
CAUSE: You assigned the Virtual Pin logic option to the specified bidirectional pin in the design. However, you must assign the Virtual Pin logic option only to input or output pins. When this condition occurs, Analysis & Synthesis ignores the Virtual Pin logic option assignment to the bidirectional pin.
ACTION: No action is required. However, to avoid receiving this message in the future, remove the Virtual Pin assignment from the bidirectional node.
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