List of Messages |
module test1 (input data1, oe1, data2, inout bidir1); wire triwire, gnd; assign gnd = 1'b0; assign triwire = oe1 ? data1 : 1'bz; assign triwire = gnd ? data2 : 1'bz; assign bidir1 = triwire; endmoduleSee the sub-messages below for a list of the affected nodes.
ACTION: Remove the always-disabled tri-state buffers from the design or connect the output-enable inputs of these buffers to something other than GND.
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