ID:335096 Timing Analysis found <number of latches> latches implemented as registers. Run the Check Timing command in the TimeQuest Timing Analyzer for more details.

CAUSE: The specified nodes (see submessages) are registers that use asynchronous load and data signals to implement a latch.

ACTION: If you wish to treat these nodes as latches during timing analysis, using the asynchronous load as the latch enable, and the asynchronous data as the data input for the latch, turn on the ANALYZE_LATCHES_AS_SYNCHRONOUS_ELEMENTS ACF option. Otherwise, no action is required.