| List of Messages | |
CAUSE: You specified a custom board trace model for this pin that differs from the Quartus Prime default for the I/O standard assigned to this pin. As a result, the delay introduced by this board trace model may be over- or underestimated when combining Quartus Prime and IBIS predicted delays.
ACTION: To correctly interface Quartus Prime timing and IBIS simulations, revert to the default board trace model.
Copyright© 2015 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS, STRATIX, and all other brands, unless noted otherwise, and/or trademarks of Altera Corporation in the U.S. and other countries.