List of Messages
Parent topic: List of Messages

ID:186287 PLL <name> clock "<name>" uses <number> Global Clock and <number> Regional Clock settings

CAUSE: The specified PLL input or output clock uses the specified number of Global Clock and Regional Clock settings.

ACTION: No action is required.

Parent topic: List of Messages

Contact Altera | Legal Notice

Copyright© 2015 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS, STRATIX, and all other brands, unless noted otherwise, and/or trademarks of Altera Corporation in the U.S. and other countries.