List of Messages |
CAUSE: The Optimize IOC Register Placement for Timing logic option is turned off. This setting prevents the Fitter from automatically packing the registers connected to input, output, or output enable pins into I/Os. However, the Fitter will still attempt to perform register packings that are specified by user assignments, for example, the Fast Input Register , the Fast Output Register , or the Fast Output Enable Register assignments.
ACTION: No action is required.
Copyright© 2015 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS, STRATIX, and all other brands, unless noted otherwise, and/or trademarks of Altera Corporation in the U.S. and other countries.