| List of Messages | |
CAUSE: You assigned output and bidirectional pins near a VREF pin or you assigned some pins too close together. The number of pins either exceeds the limit for the VREF bank and can cause instability in the VREF voltage, which can then cause any inputs depending on that VREF to be read incorrectly, or the I/O bank draws a current that exceeds the maximum amount. This message is a submessage of the message that precedes it in the Messages window and in the Messages section of the Report window.
ACTION: Reassign some of the output and/or bidirectional pins to a different VREF bank, move all input pins to a different VREF bank, reassign some pins to reduce the current density, or assign some pins to use an I/O standard with a lower current. To display I/O banks, open the Chip Planner and turn on I/O bank display IN the Layers Settings dialog box.
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