ID:169024 Following input pins may potentially conflict with the output or bidirectional pins

CAUSE: You assigned output and bidirectional pins near a VREF pin or you assigned some pins too close together. The number of pins either exceeds the limit for the V_REF bank and can cause instability in the V_REF voltage, which can then cause any inputs depending on that V_REF to be read incorrectly, or the I/O bank draws a current that exceeds the maximum amount.

ACTION: Refer to the submessage(s) in the Messages window to determine which input pins may conflict with output or bidirectional pins. Reassign some of the output and/or bidirectional pins to a different V_REF bank, move all input pins to a different V_REF bank, reassign some pins to reduce the current density, or assign some pins to use an I/O standard with a lower current. To display I/O banks, open the Chip Planner and turn on I/O bank display IN the Layers Settings dialog box.