List of Messages |
CAUSE: In a Generic Map Aspect at the specified location in a VHDL Design File (.vhd), you used a named or positional Association List to associate the specified actual generic literal value to the specified formal generic of a block. However, the literal value of the actual generic is illegal, and therefore Quartus Prime Integrated Synthesis ignored the value when elaborating the Generic Map Aspect.
ACTION: Correct the actual generic so it is a legal literal value.
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