List of Messages |
CAUSE: In an Exit Statement or a Next Statement at the specified location in a VHDL Design File (.vhd), you used the specified loop name. However, the loop name is not the same as the loop name you specified in a Loop Statement that contains the Exit Statement or Next Statement. The loop name in an Exit Statement or a Next Statement must be the same as the loop name of one of the Loop Statements that contains the Exit Statement or Next Statement.
ACTION: Change the loop name of the Exit Statement or Next Statement to match the loop name of one of the Loop Statements.
Copyright© 2015 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS, STRATIX, and all other brands, unless noted otherwise, and/or trademarks of Altera Corporation in the U.S. and other countries.