List of Messages |
CAUSE: In a Gate Instantiation at the specified location in a Verilog Design File (.v), you instantiated a basic gate primitive that is a tranif0, tranif1, rtranif0 or rtranif1 bidirectional pass switch primitive. However, bidirectional pass switch gate primitives are not supported by the Quartus Prime software.
ACTION: Edit the design to replace an enabled bidirectional pass gate with two unidirectional enabled pass gate. For example, you can replace one tranif1 gate with two cmos pass gates.
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