List of Messages |
CAUSE: In a Verilog Design File (.v) at the specified location, you used the specified identifier, but the Quartus Prime software expected this identifier to be declared as a memory.
ACTION: If you intended this identifier to be a memory, make sure it is declared as a memory. If you did not intend this identifier to be a memory, edit the design to make sure it does not refer to this identifier as a memory.
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