| List of Messages | |
CAUSE: In a design file, more than one value is assigned to the specified net. The net, however, is connecting a partition's output/bidirectional port with multiple logic, possibly tri-state logic. The only tri-state logic allowed to be connected to a partition is a single bidirectional pin.
ACTION: Reconstruct the design so that the partition port will not be part of a bus contention with multiple logic.
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