ID:186374 <name> PLL "<name>" or its input clock pin is user assigned to the bottom half of the device but its CLKOUT "<name>" feeds some locked destinations in the top half of the device using regional clock

CAUSE: You assigned the specified Regional Clock to these destinations. However, the Fitter cannot place the PLL because a PLL placed in the bottom half of the device can feed destinations only in the same half of the device using regional clock.

ACTION: Assign the PLL or its input clock to the same half of the device as the CLKOUT destinations, or change the Global Signal option on these destinations to Global Clock.