| List of Messages | |
CAUSE: The specified clock pin is driving DQS or DQ output registers and needs to be promoted to a global clock to minimize skew. Its currently assigned location does not have access to the necessary global routing resources.
ACTION: Change the location assignment for the clock pin.
Copyright© 2015 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS, STRATIX, and all other brands, unless noted otherwise, and/or trademarks of Altera Corporation in the U.S. and other countries.