List of Messages |
CAUSE: The specified clock signal must be promoted to use global clocks due to gigabit transceiver block (GXB) transmitter PLL duplication, fan-outs placed outside the quad, or an incompatible I/O standard. At the same time, the clock signal must be locked to the dedicated GXB transmitter PLL clock input pins due to the use of a predivider in the GXB transmitter PLL or GXB receiver PLL. The predivider is only available in the dedicated GXB transmitter PLL clock input pins. The I/O standards supported at the dedicated clock input pins are 1.5-V PCML, LVDS, and LVPECL.
ACTION: Modify the design to avoid GXB transmitter PLL duplication, delete the fan-outs placed outside the quad, change the I/O standard assignment, or avoid using a predivider in the GXB transmitter PLL or GXB receiver PLL.
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