List of Messages |
CAUSE: The Fitter tried to place the specified fast PLL. However, the fast PLL drives at least one non-DPA-mode SERDES. As a result, the fast PLL input clock pin must be driven by a compensated input. The Fitter cannot place the specified fast PLL.
ACTION: Modify the design so that the fast PLL input clock pin is driven by a compensated input.
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