ID:174070 Calibrated on-chip termination logic block placement failed

CAUSE: The Quartus Prime software failed to place one or more on-chip termination (OCT) logic blocks. This error can occur if a user-mode OCT is being used, the clock for the OCT calibration block is non-global, and the I/Os are placed outside the clock region. This error can also occur if the OCT logic blocks are manually instantiated in the design and have location constraints or connectivity that cannot be resolved to a legal placement.

ACTION: Constrain the I/Os that use user-mode OCT to the same region as the clock for the corresponding OCT control block, or make the clock a global signal. Also, remove any location constraints on the OCT logic blocks.