List of Messages |
CAUSE: You assigned output and bidirectional pins to the specified I/O bank near the specified VREF pin. However, the number of pins exceeds the limit for that VREF bank and can cause instability in the VREF voltage, which can then cause any inputs depending on that VREF pin to be read incorrectly.
ACTION: Reassign some of the output and/or bidirectional pins to a different VREF bank. To display I/O banks, open the Chip Planner and turn on I/O bank display IN the Layers Settings dialog box.
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