ID:167050 Connections from <name> "<name>" via XN clock lines have forced the following <number> GXB channels to the same side of the device. The selected device can have a maximum of only <number> channels on one side.

CAUSE: The specified clock divider is driving the gigabit transceiver block (GXB) channels in other quads via XN clock lines. All such channels, as well as all channels bonded with them, must be placed to the same side of the device as the clock divider. The current selected device does not have enough GXB channel locations on any side to satisfy this requirement.

ACTION: You must reduce the number of quads driven by the specified clock divider, or select a device with enough GXB channel locations on one side.