List of Messages |
CAUSE: The clkena input of the specified output phase alignment primitive is not connected to VCC while the OPERATION_MODE parameter is set to either RTENA or EXTENDED_RTENA.
ACTION: Check the design and make sure that the specified clkena input is connected to VCC . Alternatively, you can change the OPERATION_MODE parameter to a value other than RTENA or EXTENDED_RTENA.
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