List of Messages |
CAUSE: One or more delayctrlin inputs of the specified I/O clock divider block are not connected while the USE_PHASECTRLIN parameter is set to TRUE or the PHASE_SETTING parameter is larger than zero.
ACTION: Check the design and make sure that all of the delayctrlin inputs of the specified I/O clock divider block are connected. Alternatively you can change the USE_PHASECTRLIN parameter to a value other that TRUE and the PHASE_SETTING parameter to zero.
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