List of Messages |
CAUSE: The specified Clock Control block has a pllcalibrateclkdelayedin port that is driven by the specified node. This port must be sourced from the pllcalibrateclkdelayedout port of a Clock Delay Control Calibration block.
ACTION: Modify the design so that the pllcalibrateclkdelayedin port of the specified Clock Delay Control block is driven from the pllcalibrateclkdelayedout port of a Clock Delay Control Calibration block.
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