List of Messages |
CAUSE: The specified input port of the specified PLL is driven by an illegal source. The clock input port of a PLL must be driven by a non-inverted input pin or by a clock output of another PLL, optionally through a Clock Control Blocks instead of dedicated routing.
ACTION: Modify the design so that the clock input port of the specified PLL is driven by a non-inverted input pin or another PLL.
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