List of Messages |
CAUSE: The specified inclk port of the specified Clock Control Blocks is driven by the specified illegal source, but must be driven by the specified legal sources. The inclk ports of a Clock Control Block must only be driven by clock pins or PLL clock outputs.The inclk[0] and inclk[1] must be driven by pins and inclk[2] and inclk[3] must be driven by a PLL output.
ACTION: Modify the design so that inclk port of the specified Clock Control Block is driven by the specified legal sources. See the Clock Select Block description for more information.
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