CLKLOCKx1 Input Frequency logic option

A logic option that creates an internal ClockLock PLL and specifies its frequency. Turning this option on is equivalent to instantiating an altclklock megafunction with either of its ClockBoost parameters set to a value of 1. The CLKLOCKx1 Input Frequency option is provided primarily for backward compatibility with MAX+PLUS II designs. Altera recommends using the IP Catalog to instantiate PLLs in new designs.

This option must be assigned to an input pin or it is ignored. This option is also ignored if it is assigned to a device that does not have the PLL feature.

This option is available for all Altera devices supported by the Quartus® Prime Standard Edition software, except MAXII, and StratixV devices.

Scripting Information

Keyword: clklockx1_input_freq

Settings: <frequency>

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