A logic option that adds the D and Q ports of a register node to the list of signals in the output waveforms.
This option is useful because it makes the D and Q ports of a register node observable during a simulation.
The option must be assigned to a register node or it is ignored. This option is available for all Altera devices.
Scripting Information |
Keyword: sim_tap_register_d_q_ports Settings:on | off |