A logic option that specifies the overall goal for logic optimization, that is, whether to attempt to achieve maximum speed performance, minimum area usage, or balance high performance with minimal logic usage during compilation.
You can use this option as a project-wide option, or assign it to a design entity. This option is available for all Altera devices.
For detailed information, refer to the device family data sheet available from the Literature section of the Altera website.
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K eyword: cycloneii _ optimization_technique Device Name: CycloneIII, and CycloneIV Settings:speed |area |balanced Keyword:maxii _optimization_technique Device Name: MAXII and MAXV Settings:speed|area |balanced Keyword: optimization_technique Device Name:ArriaII, StratixIV, StratixV Settings:speed |area |balanced Keyword:stratixii _optimization_technique Device Name: StratixIII Settings:speed |area |balanced *default |