Memory Interface Data Pin Group logic option

A logic option that specifies the group width (4, 10, 19, or 37), and associates a pin with another pin. Enabling this option allows the Fitter to view the pins as part of the same memory interface pin group. I/O pins of this pin group must be placed in the DQ pin locations of a single DQS group. This option must be assigned to an I/O pad, input buffer, or output buffer or it is ignored.

This option is available for supported device(ArriaII, CycloneIII, CycloneIV, StratixIII, and StratixIV) families.

Scripting Information

Keyword:memory_interface_data_pin_group

Settings: <integer>

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