A logic option that allows the Compiler to infer shift registers of any size even if they do not meet the design's current minimum size requirements.
This option is useful for minimizing the area of a design that is close to the device limit.
This option must be assigned to a design entity or it is ignored. This option is available for all Altera devices supported by the Quartus® Prime Standard Edition software except MAX series devices.
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Keyword: allow_any_shift_register_size_for_recognition Settings:on | off *default |