Parent topic: Quartus Prime Standard Edition Verilog HDL Support Parent topic: Quartus Prime Standard Edition Verilog HDL Support

Section 13—Specify Blocks

Section

Construct

Quartus® Prime Standard Edition Support

13.1

Specify Blocks

Ignored for synthesis. The Quartus® Prime Standard Edition software ignores this construct during synthesis.

13.2

Specify Parameters (Specparams)

Ignored for synthesis. The Quartus® Prime Standard Edition software ignores this construct during synthesis.

13.3

Specify Block Module Path Delays

Ignored for synthesis. The Quartus® Prime Standard Edition software ignores this construct during synthesis.
Parent topic: Quartus Prime Standard Edition Verilog HDL Support Parent topic: Quartus Prime Standard Edition Verilog HDL Support

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