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Specifies whether the associated dual-purpose pin, nWS,
nRS, nCS, CS,
RDYnBUSY, Data[7..1], Data[7..2],
Data[0], Data[1], nCEO,
ASDO, DCLK, FLASH_nCE, or
nCSO, or other active parallel pins, including,
Data[15..8], PADD[23..0], NRESET,
NAVD, NOE, NWE, and
RDY, is reserved, and the purpose for which it is reserved, as
indicated with the following options:
-
Use as regular
I/O—The dual-purpose pin is not
reserved;
instead, it is used as an I/O pin in user mode.
- Use as
programming pin—ThenCEOpin can be used as a dedicated programming
pin. This option is available only for CycloneIII, and
CycloneIV family devices.
-
As input
tri-stated—Thedual-purpose pin is reserved as an input
pin.
-
As output driving
ground—The dual-purpose pin is reserved as an
output pin and drives the ground signal.
-
As output driving an unspecified
signal—The dual-purpose pin is reserved as an
output pin and drives any signal.
- Compiler
configured—The Compiler automatically selects the best
reserve setting for the dual-purpose pin, considering the
configuration scheme specified on the Configuration
page, and if the pins are only
used for configuration. If your design uses the Active Parallel
configuration scheme and the Programmer does not communicate
directly with the parallel flash device in user mode, you should
reserve all dual-purpose pins connected to the parallel flash
device as Compiler configured.
Note: Refer to the data
sheet and device pin tables for the current device family for more
information on dual-purpose configuration pins, which is available
from the Literature section of the Altera
website.
Note: TheASDOpin is also controlled by
thereserve_data1_after_configurationkeyword for Cyclone III and
Cyclone IV devices.