primitive

 


One of the basic functional blocks used to design circuits with Quartus II software. Primitives are used in Block Design Files (.bdf), AHDL Text Design Files (.tdf), VHDL Design Files (.vhd), and Verilog Design Files (.v).

Block Editor primitives include buffers, registers, a latch, input and output primitives, and logic primitives. Primitive symbols for Block Editor files are provided in the \quartus\libraries\primitives directory created during installation.

AHDL, Verilog HDL, and VHDL primitives—which include buffers, registers, and a latch—are a subset of the primitive symbols used in Block Editor files. Other functions are represented by logical operators, ports, Verilog HDL gate primitives, and other constructs. Verilog HDL primitives and Function Prototypes for AHDL primitives are built into the Quartus II software; Component Declarations for VHDL primitives are provided in the maxplus2 package in the \quartus\libraries\vhdl\altera directory. In order for VHDL primitives to function properly, maxplus2.lmf must be specified as the Library Mapping File (.lmf).

 

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