Verilog HDL Defparam Statement error at <location>: value for parameter "<name>" must be constant expression

(ID: 10192)

CAUSE: In a Defparam Statement at the specified location in a Verilog Design File (.v), you specified a value for the specified parameter that is not a constant expression. You must specify only constant expressions for parameter values.
ACTION: Change the parameter value to a constant expression.

See also:

Section 12.2.1 of the IEEE Std. 1364-2001 IEEE Standard Verilog Hardware Description Language manual