Running a Timing Analysis (TimeQuest Timing Analyzer)


You can use the TimeQuest Timing Analyzer to validate the timing performance of all logic in a design, and to guide logic placement by the Fitter. You can direct the Compiler to automatically use the TimeQuest analyzer during the compilation process, or you can run the TimeQuest analyzer separately. If you change any settings or source files that might affect fitting, you must regenerate and load the timing netlist to include those changes in a TimeQuest analysis.

You can specify SDC timing constraints and exceptions with the commands in the TimeQuest analyzer Constraints menu or by creating a Synopsys Design Constraints File (.sdc).


ExpandTo run an early timing estimate:

ExpandTo run a TimeQuest analysis:



Note: You can right-click any command in the Tasks pane and click Start Again to run that command again in the TimeQuest Timing Analyzer task flow.



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