DP8051 Pipelined High-Performance 8 bit Microcontroller

The DP8051 is an ultra high performance, speed-optimized soft core for single-chip, 8-bit embedded controllers. The DP8051 is dedicated for operations with fast (typically on-chip) and slow (off-chip) memories.  The core has been designed with a special focus on performance-to-power consumption ratio.  This ratio is extended by an advanced power management unit (PMU).  The DP8051 is 100 percent binary-compatible with the industry standard 8051 8-bit microcontroller.

  • 100 percent software-compatible with industry standard 8051
  • Pipelined RISC architecture
  • Up to 14.632 VAX MIPS at 100 MHz
  • 24 times faster multiplication operations
  • 12 times faster addition operations
  • Up to 256 bytes of internal (on-chip) Data Memory
  • Up to 64K bytes of internal (on-chip) or external (off-chip) Program Memory
  • Up to 16M bytes of external (off-chip) Data Memory
  • User programmable Program Memory Wait States solution for a wide range of memory speeds
  • User programmable External Data Memory Wait States solution for a wide range of memory speeds
  • De-multiplexed address and data bus allows easy connection to memory
  • Dedicated signal for Program Memory writes
  • Interface for additional Special Function Registers
  • Fully-synthesizable, static synchronous design with positive-edge clocking and no internal tri-states
  • Scan test ready

Table 1 lists the typical device utilization results for the megafunction.

Table 1. Typical Device Utilization

Device Speed Grade Performance (fMAX) Utilization
Cyclone® III-62,400 logic cells111 MHz
Arria® GX-61,595 adaptive look-up
tables (ALUTs)
112 MHz
Stratix® IV GX-21,580 ALUTs196 MHz

For additional information, contact Digital Core Design at:

Digital Core Design 
Wroclawska 94 
41-902 Bytom 
Poland 
Tel. +48 32 282 82 66 
Fax +48 32 282 74 37 
E-mail: aleads@dcd.pl 
Website: http://www.dcd.com.pl