PCI Express

from PLDA

Features

  • PCI Express® Specification 1.1 and 2.0 compliant
  • x1, x4, x8 PCIe 1.1 and x1, x4 PCIe 2.0
  • Suitable for root complex, bridge, switch, and endpoint designs
  • Upstream and/or downstream mode for link initialization
  • Up to eight virtual channels (VC)
  • Optional backend interface on user's clock domain
  • Supports up to 4 KB data payload size
  • Supports all message, completion, memory, and I/O requests
  • Implements type 0 configuration space for endpoint designs
  • Implements type 1 configuration space for root, switch, and bridge designs
  • Up to six base address registers (BARs) plus expansion ROM available for endpoint
  • All I/O and memory windows implemented for root, switch, and bridge
  • All power management states and associated logic implemented
  • Supports legacy PCI Power Management
  • Supports ExpressCard

PCI Express Product Selector Guide for Altera FPGAs

Table 1 shows the PCI Express Selector Guide for Altera® FPGAs.

Table 1. PCI Express Selector Guide for Altera FPGAs (1)

End Point/
Rootport

Embedded PCI Express PHY

External PCI Express PHY

Stratix
GX

Stratix
II GX

Arria
GX

Stratix

Stratix
II

Stratix
III

Cyclone

Cyclone
II

Cyclone
III

Gen1
End Point
(x1)
Check MarkCheck MarkCheck MarkCheck MarkCheck MarkCheck MarkCheck MarkCheck MarkCheck Mark
End Point
(x4)
Check Mark

Check Mark

Check Mark

Check Mark

Check Mark

Check Mark

Check Mark

Check Mark

Check Mark

End Point
(x8)
Check Mark Check MarkCheck Mark
Rootport
(x1)
Check MarkCheck MarkCheck MarkCheck MarkCheck MarkCheck Mark
Rootport
(x4)
Check MarkCheck MarkCheck MarkCheck MarkCheck MarkCheck Mark
Rootport
(x8)
Gen2
End Point
(x1)
Check Mark
End Point
(x4)
Check Mark

Note:

  1. Stratix, Arria, and Cyclone are trademarks of Altera Corporation.

Deliverables

  • Core synthesis files (encrypted VHDL or Verilog for Quartus® Prime design software)
  • Pre-compiled simulation libraries for ModelSim® intellectual property (IP) Wizard
  • Customization assistant
  • Constraint file generator
  • Active HDL supported upon request

Verification Environment

  • Testbench pre-compiled simulation libraries for ModelSim software
  • VHDL/Verilog test scripts and compliance checklist

Software Resources

  • PCI Express device driver: Windows, Linux
  • API source code
  • GUI applications with source code
  • Reference designs that are ready for hardware implementation
  • Documentation, including a user guide and design guide
  • One-year technical support and maintenance with free upgrades

Contact Information

For additional information, contact:

PLDA
2570 North 1st Street,
2nd Floor, Suite 218
San Jose, CA, 95131 USA
Phone: (408) 273 4528
Fax: (408) 273 4628
Email: sales@plda.com
URL: http://www.plda.com