IntelliProp SATA Host Core

from IntelliProp

Features

  • Compliant with SATA 1.5-Gbps, 3.0-Gbps, and 6.0-Gbps industry specifications
  • Transport, advanced host controller interface (AHCI), or Application (AHCI-Lite) interface options
  • Supports either serializer/deserializer (SERDES) or PHY interface
  • Fully verified with IntelliProp's proven Serial Advanced Technology Attachment (SATA) verification intellectual property (IP)
  • Standalone testbench included
  • Synchronous design for easy integration
  • Synthesizable Verilog design
  • Protocol interface is compliant with the SATA 3.0 specification defined by the SATA-IO

Features

  • Compliant with SATA 1.5-Gbps, 3.0-Gbps, and 6.0-Gbps industry specifications
  • Transport, advanced host controller interface (AHCI), or Application (AHCI-Lite) interface options
  • Supports either serializer/deserializer (SERDES) or PHY interface
  • Fully verified with IntelliProp's proven Serial Advanced Technology Attachment (SATA) verification intellectual property (IP)
  • Standalone testbench included
  • Synchronous design for easy integration
  • Synthesizable Verilog design
  • Protocol interface is compliant with the SATA 3.0 specification defined by the SATA-IO

Block Diagram

Description

The IntelliProp SATA Host Core is available for integration into host FPGA designs to provide an industry- compliant SATA 1.5-Gbps, SATA 3.0-Gbps, or SATA 6.0-Gbps interface. Some target applications for the IntelliProp SATA Host Core are:

  • Enterprise storage interconnect
  • Internal interconnect for workstation storage
  • HDD hot swap environments
  • Applications requiring small form factor and improved performance over ATA

The SATA host core is designed to be connected to a SATA-compliant device application to send and receive out-of-band (OOB) signals, primitives, and SATA frame information structures. The IntelliProp SATA host core is fully verified in pseudo-random simulation.

Device Utilization and Performance

Table 1. Typical Device Utilization for the Megafunction

Target Device Speed Grade Utilization Performance
fMAX
LUT M9K Blocks DSP Blocks
Stratix® IV-32,00010150 MHz
Arria® II GX-32,00010150 MHz

Deliverables

  • Comprehensive user documentation
  • Post-synthesis EDIF netlist or encrypted register transfer level (RTL)
  • Synthesis or place-and-route script
  • Simulation script
  • Vectors
  • Expected results
  • 183 days (6 months) off-site support via telephone or email

Contact Information

For additional information, contact IntelliProp at:

IntelliProp
1823 Sunset Place, Suite E
Longmont, C0 80501
USA
Phone: +1 (303) 774-0535 x205
Fax: +1 (303) 774-0535
Email: info@intelliprop.com
URL: http://www.intelliprop.com