The XAUI PHY Intel® FPGA IP core allows you to easily build systems with a very high throughput 10G Ethernet connection. This XAUI PHY along with a 10GbE media access control (MAC) IP core enables an Intel FPGA to interface to a 10GbE network through a variety of external devices, including a 10GbE PHY device or optical transceiver module.
You can implement the XAUI PHY in hard silicon in Intel's 65 nm and 40 nm FPGAs with serial transceivers faster than 3 Gbps. The PHY management functions are implemented in soft IP. In Intel 20 nm and beyond FPGA families, a XAUI PHY can be implemented in soft IP.