Interlaken Look-Aside is a scalable protocol that allows interoperability between a datapath device and a look-aside coprocessor with packet transfer rates from 10 Gbps to 300 Gbps and beyond. The Interlaken Look-Aside Intel® FPGA IP core continues to scale with today’s demand for more bandwidth and higher performance needs. Intel has been a part of the Interlaken Alliance since its inception in 2007 and continues to innovate with new protocol features to provide customers with robust and easy-to-implement Interlaken Look-Aside intellectual property (IP) solutions. The Interlaken Look-Aside Intel® FPGA IP core offer a wide range of bandwidths up to 300G.
Intel and Cavium Team Up to Provide Pre-Verified Packet Classification Solution
The Interlaken Look-Aside Intel® FPGA IP core on an Intel® Stratix® V FPGA with Cavium’s NEURON Search* Processor provides customers a proven packet classification solution that can easily be implemented on any networking or data center platform.
To further simplify our customers’ decision making process, Intel and Cavium have generated an interoperability report which details the various interoperability modes and performance metrics that can be achieved with this complete, high-performance chipset. Contact your Sales person for a copy of this report.
Figure 2. Intel and Cavium Interlaken Look-Aside Connectivity Setup
Successfully passing traffic reliably using various packet sizes
Logical channel processing validated
Maximum packet throughput = 614 Mpps for packets under 12 bytes
Average Latency = 256 nsec (on Intel FPGA ILA IP)
Intel FPGA Interlaken Look-Aside IP Solution
The Interlaken Look-Aside Intel FPGA IP core includes Intel's technology-leading transceivers: physical medium attachment (PMA), physical coding sublayer (PCS), and media access control (MAC) layers. The PCS and PMA layers are hardened within the Intel® Stratix 10, Intel® Arria® 10, Stratix V, and Arria® V FPGAs. The Interlaken Look-Aside IP core has been through extensive simulation verification and has been proven to work on multiple internal and customer platforms. Intel continues to set up interoperability activities with leading ASSP vendors for next-generation platforms. The Intel FPGA IP Evaluation Mode feature allows the user to evaluation the IP without needing a license.
Intel offers customized Interlaken Look-Aside IP solutions. For more information, please contact your local sales representative.