Interlaken Look-Aside is a scalable protocol that allows interoperability between a datapath device and a look-aside coprocessor for short, transaction-related transfers. A look-aside coprocessor is connected "to the side" of the datapath, and is not in-line of the main datapath of the switch, router, or other networking device. Interlaken Look-Aside is not directly compatible with Interlaken and can be considered a different operational mode.
The Interlaken Look-Aside IP core is suited for coprocessing packet classification typically used for networking applications such as: Quality of service routing, traffic profiling, and firewall functions. The IP's low-latency packet interface, coupled with its efficient data processing capability, enables a high degree of design scalability for emerging network applications.
This IP core includes Intel's technology-leading transceivers:
- Physical medium attachment (PMA)
- Physical coding sublayer (PCS)
- Media access control (MAC) layers.
The PCS and PMA layers are hardened within the Intel® Stratix® 10, Intel® Arria® 10, Stratix V, and Arria V FPGAs.