To help shorten your design time, Intel provides full production licenses for some of our most popular intellectual property (IP) cores (shown in Table 1) in the Intel® FPGA IP Base Suite, which is free with Intel Quartus® Prime Standard and Pro design software editions.
If you have an active license to Quartus Prime Standard Edition or Quartus Prime Pro Edition design software, simply log on to the Self-Service Licensing Center to generate your license file and take advantage of the IP Base Suite.
The IP Base Suite is also installed with Quartus Prime Lite Edition software. Full licenses to this suite are purchased separately. Contact your local sales representative to learn more.
Over 12 major finite impulse response (FIR) filter architectures for use across multiple digital signal processing (DSP) applications. Generates bit-accurate and clock-cycle accurate models developed in Verilog, VHDL, MATLAB and provides coefficient generation. Provides significantly lower FPGA resource usage and increased performance than the original FIR Compiler for most FIR filter implementations. FIR filter performance, internal pipelining, and logic resource usage are optimized based on user inputs.
A high-performance, highly parameterizable fast Fourier transform (FFT) processor. The FFT function implements a Radix-2/4 decimation-in-frequency FFT algorithm for transform lengths of 2m where 6 ≤ m ≤ 14, internally using a block-floating-point architecture to maximize signal dynamic range in the transform calculation.
The Mentor Graphics* AXI Verification IP Suite (Intel FPGA Edition) provides bus functional models (BFMs) to simulate the behavior and to facilitate the verification of IP that conforms to the Advanced Microcontroller Bus Architecture Advanced eXtensible Interface (AMBA* AXI*) Protocol.