Stratix Series FPGA Fracturable Look-Up Table Logic Structure

Stratix^{®} series high-density, high-performance FPGA families leverage Altera's innovative adaptive logic module (ALM) logic structure (shown in Figure 1) to provide the most efficient logic fabric ever in any FPGA.

The ALM logic structure is fully integrated in Quartus^{®} II software to easily deliver the highest performance, highest logic utilization, and lowest compile times, as demonstrated by Stratix III FPGAs on OpenCore designs.

Each ALM in a Stratix series FPGA has eight inputs with a fracturable look-up table (LUT), two dedicated embedded adders, two dedicated registers, and additional logic enhancements. These features enable the ALM to implement select 7-input LUT-based functions, all 6-input logic functions, and two independent functions consisting of smaller LUT sizes (such as two independent 4-input LUTs).

Figure 2 shows the different LUT configurations that a single ALM can support, and Table 1 describes each ALM configuration.

Table 1. Stratix Series FPGA ALM Configurations

Configuration

Description

One Stratix series FPGA ALM can support any 6-input logic function.

One Stratix series FPGA ALM can be configured to implement two independent 4-input or smaller LUTs.

One Stratix Series FPGA ALM can be configured to implement a 5-input LUT and a 3-input LUT. The inputs to the two LUTs are independent of each other. The 3-LUT can be used to implement any logic function that has three or fewer inputs. Therefore, a 5-input LUT and 2-input LUT combination is also available.

One Stratix series FPGA ALM can be configured to implement a 5-input LUT and a 4-input LUT. One of the inputs is shared between the two LUTs. The 5-input LUT has up to four independent inputs. The 4-input LUT has up to three independent inputs. The sharing of inputs between LUTs is very common in FPGA designs, and the Quartus II development software automatically seeks logic functions that are structured in this manner.

One Stratix series FPGA ALM can be configured to implement two 5-input LUTs. Two of the inputs between the LUTs are common, and up to three independent inputs are allowed for each 5-input LUT.

If two 6-input functions have the same logic operation and four shared inputs, then the two 6-input functions can be implemented in one Stratix series FPGA ALM.

One Stratix series FPGA ALM in the extended mode can implement a subset of a 7-variable function. The Quartus II development software automatically recognizes the applicable 7-input function and fits it into an ALM.