Digital Signal Processing Blocks in Stratix Series FPGAs

With embedded hard digital signal processing (DSP) blocks, Stratix® series FPGAs are an ideal solution for high-performance, high-precision DSP applications. The DSP blocks are very power efficient and operate at far higher frequencies than the equivalent circuits in a soft implementation. When compared to DSP processors, Stratix series FPGAs deliver:

  • DSP performance of an order of magnitude higher
  • Ability to implement variable-precision signal processing (with Stratix V FPGAs only)
  • Significantly lower system power consumption
  • Smaller board space
  • More platform scalability

The DSP block architecture has been optimized to implement various common DSP functions with maximum performance and minimum logic resource utilization. In addition to multipliers, each DSP block has functions that are frequently required in typical DSP algorithms. These functions include pre-adders, adders, subtractors, accumulators, coefficient register storage, and a summation unit. With these rich features, the DSP blocks in Stratix series FPGAs are ideal for applications with high-performance and computationally intensive signal processing functions, such as finite impulse response (FIR) filtering, fast Fourier transforms (FFTs), digital up/down conversion, high-definition (HD) video processing, and HD CODECs.

Table 1 compares the DSP resources in the Stratix series FPGA families.

Table 1. A Comparison of the DSP Blocks in Stratix Series FPGAs

Stratix Series FPGA Family (1) Maximum DSP Block
per Block
18x18 Multipliers
per Block
27x27 Multipliers
per Block
36x36 Multipliers
per Block
Stratix FPGAs333 MHz8411
Stratix II FPGAs450 MHz8411
Stratix III FPGAs550 MHz8422
Stratix IV FPGAs550 MHz8422
Stratix V FPGAs (2)500 MHz12842


  1. Select the appropriate Stratix series family link for complete details on DSP features in a specific Stratix series FPGA family.
  2. These numbers relate to the resources found in four variable-precision DSP blocks.